rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a 250 msps video digital-to-analog converter AD9701 functional block diagram general description the AD9701 is a high speed, 8-bit digital-to-analog converter with fully integrated composite video functions. high speed ecl input registers provide synchronous operation of data and control functions up to 250 msps. the AD9701 incorporates onboard control functions including horizontal sync, blanking, reference white level and a 10% bright signal for highlighting. the setup level is also adjustable from 0 ire units to 20 ire units through the control pin. an internal voltage reference allows the AD9701 to operate as a stand-alone video reconstruction dac. the AD9701 is available as an industrial temperature range device, C25 c to +85 c, and as an extended temperature range device, C55 c to +125 c. both grades of the AD9701 are pack- aged in a 22-pin ceramic dip with the extended temperature device also available in a 28-pin lcc package. pin configurations features 250 msps update rate low glitch impulse complete composite functions internal voltage reference single C5.2 v supply applications raster scan displays color graphics automated test equipment tv video reconstruction one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 617/329-4700 world wide web site: http://www.analog.com fax: 617/326-8703 ? analog devices, inc., 1996
electrical characteristics AD9701bq AD9701sq/se parameter temp min typ max min typ max units resolution 8 8 bits dc accuracy differential linearity +25 c 0.25 0.5 0.25 0.5 lsb full 1.0 1.0 lsb integral linearity +25 c 0.25 0.5 0.25 0.5 lsb full 1.0 1.0 lsb monotonicity full guaranteed guaranteed initial offset error 3 zero-scale offset error 4 +25 c 0.05 0.9 0.05 0.9 mv full 0.9 0.9 mv zero-scale offset drift coefficient full 2 2 m v/ c full-scale drift coefficient full 50 50 m v/ c analog output voltage output 5 10% bright 6 full C0.9 0 C0.9 0 mv reference white full C67.45 C71 C74.55 C67.45 C71 C74.55 mv blanking (setup = 0 ire) 7 full C698.55 C708.5 C718.45 C698.55 C708.5 C718.45 mv sync (setup = 0 ire) 8 full C979.25 C993.5 C1007.75 C979.25 C993.5 C1007.75 mv current output 5 10% bright 6 full C0.024 0 C0.024 0 ma reference white full C1.805 C1.9 C1.996 C1.805 C1.9 C1.995 ma blanking (setup = 0 ire) 7 full C18.63 C18.9 C19.16 C18.63 C18.9 C19.16 ma sync (setup = 0 ire) 8 full C26.11 C26.5 C26.87 C26.11 C26.5 C26.87 ma output compliance range full C1.6; +0.1 C1.6; +0.1 v output resistance +25 c 640 800 640 800 w dynamic performance update rate +25 c 225 250 225 250 msps output propagation delay 9 +25 c56 56ns output settling time 10 current +25 c8 8 ns voltage +25 c12 12 ns output slew rate 11 +25 c 255 300 255 300 v/ m s output rise time 11 +25 c 1.7 2.0 1.7 2.0 ns output fall time 11 +25 c 1.7 2.0 1.7 2.0 ns glitch impulse +25 c 60 70 60 70 pv-s setup control 12 setup level (grounded) full 0 0 ire setup level (open) full 7.5 7.5 ire setup level (tied to C5.2 v with 1 k w ) full 10 10 ire setup level (C5.2 v) full 20 20 ire digital inputs logic 1 voltage full C1.1 C1.1 v logic 0 voltage full C1.5 C1.5 v logic 1 current full 100 100 m a logic 0 current full 15 15 m a input capacitance +25 c 4 5.5 4 5.5 pf data setup time +25 c 0.1 0.1 ns data hold time +25 c 1.4 1.4 ns C2C AD9701Cspecifications rev. a absolute maximum ratings 1 supply voltage (Cv s ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . C7 v digital input voltages (including strobe, sync, blanking, 10% bright and reference white) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 v to Cv s analog output current . . . . . . . . . . . . . . . . . . . . . . . . 37 ma power dissipation (+25 c free air) 2 . . . . . . . . . . . . 780 mw operating temperature range AD9701bq . . . . . . . . . . . . . . . . . . . . . . . . C25 c to +85 c AD9701sq/se . . . . . . . . . . . . . . . . . . . . . C55 c to +125 c storage temperature range . . . . . . . . . . . . C65 c to +150 c junction temperature . . . . . . . . . . . . . . . . . . . . . . . . +175 c lead soldering temperature (10 sec) . . . . . . . . . . . . +300 c (supply voltages = C5.2 v; r l = 37.5 v ; setup = 0 v, unless otherwise noted)
C3C rev. a AD9701 AD9701 AD9701bq AD9701sq/se parameter temp min typ max min typ max units power supply 13 supply current (C5.2 v) +25 c 140 160 140 160 ma full 160 160 ma nominal power dissipation +25 c 728 728 mw power supply rejection ratio 14 full 3 6 3 6 mv/v notes 1 absolute maximum ratings are limiting values to be applied individually, and beyond which serviceability of the circuit may be impaired. functional operability under any of these conditions is not necessarily implied. exposure to absolute maximum rating conditions for extended periods may aff ect device reliability. 2 typical thermal impedance . . . 22-pin ceramic q ja = 64 c/w; q jc = 16 c/w 28-pin ceramic lcc q ja = 70 c/w q jc = 21 c/w 3 sync, blanking, and reference white are inactive (logic 1). i set ? 1.26 v/r set . 4 all bits at logic high. 5 all values are relative to full-scale output after being normalized to nominal value. typical variation in full-scale output fr om device to device can reach 10%, for a fixed r set resistor. 6 the effect of 10% bright algebraically adds to the output waveform. 7 the output level with blanking active (logic 0) is determined by the setup control level. 8 in normal operation, the blanking input is activated (logic 0) prior to or in conjunction with the sync input. the effect of the sync output is relative to the setup level. 9 measured from edge of strobe to 50% transition point of the output signal. 10 measured with full-scale change in output level, from the 10% transition level to within 0.2% of the final output value. 11 measured from 10% to 90% transition point for full-scale step output. 12 an ire unit is 1% of the grey scale (gs range) with a 0 ire setup level. 13 supply voltage should remain stable within 5% for normal operation. 14 measured at 5% of Cv s . specifications subject to change without notice. digital inputs vs. analog output bit bit bit bit bit bit bit bit 10% ref. comp. analog 12345678 bright white blanking sync output (mv) 11111111 0 1 1 1 0 11111111 1 1 1 1 C71 10000000 0 1 1 1 C320 00000000 0 1 1 1 C637.5 00000000 1 1 1 1 C708.5 xxxxxxxx 0 0 1 1 0 xxxxxxxx 1 0 1 1 C71 xxxxxxxx 0 1 0 1 C637.50 1 xxxxxxxx 0 1 0 1 C690.75 2 xxxxxxxx 0 1 0 1 C708.50 3 xxxxxxxx 0 1 0 1 C779.50 4 xxxxxxxx 0 1 0 0 C922.50 1 xxxxxxxx 0 1 0 0 C975.75 2 xxxxxxxx 0 1 0 0 C993.50 3 xxxxxxxx 0 1 0 0 C1064.50 4 xxxxxxxx 1 1 0 0 C993.50 1 xxxxxxxx 1 1 0 0 C1046.75 2 xxxxxxxx 1 1 0 0 C1064.50 3 xxxxxxxx 1 1 0 0 C1135.50 4 notes 1 setup (pin 21) grounded (0 ire units). 2 setup (pin 21) open (7.5 ire units). 3 setup (pin 21) to C5.2 v through 1 k (0 ire units). 4 setup (pin 21) to C5.2 v (20 ire units). ordering guide temperature package device range description option* AD9701bq C25 c to +85 c 22-pin dip, industrial temperature q-22 AD9701se C55 c to +125 c 28-pin lcc, extended temperature e-28a AD9701sq C55 c to +125 c 22-pin dip, extended temperature q-22 *e = leadless ceramic chip carrier; q = cerdip.
AD9701 C4C rev. a functional description pin name description ground one of three ground returns. all grounds should be connected together near the AD9701. Cv s negative supply pin, nominally C5.2 v. bit 1 (msb) one of eight digital input bits. bit 1 (msb) is the most-significant-bit of the digital input word. bit 2Cbit 7 one of eight digital input bits. bit 8 (lsb) one of eight digital input bits. bit 8 (lsb) is the least-significant-bit of the digital input word. strobe data and control register strobe input. strobe is leading edge triggered. ground one of three ground returns. all grounds should be connected together near the AD9701. setup the setup input determines the position of the blanking level relative to the reference black level (all data bits at logic 0). the setup level is adjustable from 0 ire units to 20 ire units be- low the reference black level (an ire unit is 1% of the grey scale range). setup level configuration (pin 21) 0 ire units ground 7.5 ire units open 10 ire units connection to C5.2 v through 1 k w 20 ire units connection to C5.2 v 10% bright 10% bright adds an additional current to the output level, equal to roughly 10% of the grey scale range. the 10% bright is active logic low and ope rates independently of all other inputs. composite blanking the composite blanking input, active logic low, forces output to the blanking level set with the setup input. composite sync the composite sync input, active low, creates a negative going horizontal synchronization pulse relative to the blanking level. under normal operating conditions, the composite blanking signal should precede and extend past the composite sync signal. see setup for additional information. reference white the reference white input, active low, overrides the data inputs and forces the output to the maximum grey scale level. compensation the compensation input insures adequate gain stability for the internal reference amplifier. under normal operating conditions, the compensation input is decoupled to ground through a 0.1 m f capacitor. current set the current set input determines the full-scale or grey scale range. the effects of the video control functions are in addition to the grey scale range. (168 w r set 600 w ). i outmax ? 4 i set = 4(1.26 v/r set ) output analog output. ground one of three ground returns. all grounds should be connected together near the AD9701. system timing diagrams
C5C rev. a AD9701 die layout and mechanical information die dimensions . . . . . . . . . . . . . . . . 107 3 104 3 15 ( 2) mils pad dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 4 mils metalization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . aluminum backing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . none substrate potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Cv s passivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . oxynitride die attach . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . gold eutectic bond wire . . . . . . . 1.25 mil aluminum; ultrasonic bonding or 1 mil gold; gold ball bonding applications information raster scan video displays image data on a line by line basis, with timing and control signals inserted between the lines. the control signals include the horizontal synchronization pulses, which are used to align the display circuitry at the beginning of each line. after the complete video image is displayed on the monitor, the process begins again with the next image. the ver- tical reset pulse(s) that initiate this timing sequence are located between each video image. raster graphics configuration for ttl systems the image data is distinguished from the timing information by its location relative to the blanking level. the blanking reference level is at the blackest extreme of the image data and all timing signals are designed to fall below the blanking level so as not to be seen on the monitor. the actual image data is located above the blanking level and it may be further separated from the tim- ing signal by the setup level. the setup level is simply a buffer zone between the timing and image data. generation of the timing signals for the AD9701 is controlled by the composite blanking and the composite sync inputs. in normal operation, the output level of the AD9701 is forced to the blanking level (black) with the com- posite blanking control so that when the synchronization occurs, it will not interfere (be seen) with the monitor image. the composite sync control forces the output level below the blanking level, generating the synchronization pulse. the grey scale is the image intensity range located above the blanking level by the amount of the setup level. the setup level is reference black, the darkest displayable picture intensity. the top of the grey scale is reference white or the brightest picture intensity. as an 8-bit device, the AD9701 divides the gray scale into 256 individual levels. normal raster scan waveforms divide the region between the blanking level and reference white into 100 ire units (interna- tional radio engineers). the setup level can range from 0 to 20 ire units but typically is around 10 ire units, and the synchro- nization pulse level typically falls 40 ire units below the blank- ing level. for the AD9701, the reference white level is 10 ire units below the full-scale output range (0 ma out ). in terms of priority, the reference white control over- rides the data inputs, but both composite sync and composite blanking override the data inputs and the reference white control. a fourth control is active at all times, 10% bright , which adds approximately 10 ire units to the output level no matter what the input state of the AD9701. the 10% bright control is primarily used to high- light areas of the video image. as with any high-speed device, the AD9701 requires a substan- tial low impedance ground plane and high quality ground con- nections to achieve the best performance. performance can also be improved with adequate power supply decoupling near the supply pins of the AD9701. in ecl mode, the output of the AD9701 is designed to drive 75 w cable directly, with 75 w ter- minations to ground at both ends of the cable. for ttl con- figurations, the output should be terminated to +5.0 v through an 82 w resistor (see circuit below). standard reconstruction configuration
AD9701 C6C rev. a outline dimensions dimensions shown in inches and (mm). c1127C9C9/87 printed in u.s.a. 22-pin side-brazed dip 22-pin ceramic dip 28-pin lcc
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